1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device capable of easily carrying a driving unit having a switching element on a liquid crystal panel, and a fabrication method thereof.
2. Description of the Related Art
Generally, different kinds of flat panel display devices have been used in portable telephones, computer monitors, and television sets because of their superior visibility and low power consumption characteristics. These flat panel display devices have similar heat emission amounts to cathode ray tube (CRTs) devices having the same screen size, and include plasma display panel (PDP) devices, field emission display (FED) devices, and LCD devices.
The LCD device includes two substrates facing each other and each having an electrode for generating an electric field, and a liquid crystal layer interposed therebetween to display images by controlling liquid crystal molecules using the electric field generated by a voltage applied to the electrodes of the respective substrates.
FIG. 1 is a plane view of an LCD device according to the related art. As shown in FIG. 1, the LCD device includes a liquid crystal panel 5 and a driving unit 7 for driving the liquid crystal panel 5. The liquid crystal panel 5 includes a first substrate 1, a second substrate 2, and a liquid crystal layer (not shown) interposed therebetween. The first substrate 1 is provided with a plurality of gate bus lines, a plurality of data bus lines vertically crossing the gate bus lines, and thin film transistors formed at cross points of the gate and data bus lines (not shown). The second substrate 2 is provided with a color filter layer and a common electrode (not shown).
The plurality of gate and data bus lines are arranged on the first substrate 1 to cross each other perpendicularly. At each of the cross points of the gate and data bus lines, a thin film transistor (not shown) is provided. Each of the gate bus lines is connected to a gate electrode of the thin film transistor arranged in one column or one row, and each of the data bus lines is connected to a source electrode arranged in one row or one column. A drain electrode of the thin film transistor is connected with a corresponding pixel electrode. A unit pixel region to display a unit pixel is defined by one thin film transistor and one pixel electrode. The second substrate 2 is provided with a color filter layer consisting of red (R), Green (G) and blue (B) color filters, and a black matrix (BM) layer for partitioning the color filters. A common electrode is formed on the color filters.
The driving unit 7 includes a gate driving unit 27 for supplying gate signals, and a timing control unit 11 which supplies control signals for controlling the gate driving unit 27 and a data driving unit 17. The gate driving unit 27 includes a gate printed circuit board (PCB) 33 on which transmission lines of the control signals provided by the timing control unit 11 are mounted, and a gate drive integrated circuit (IC) for generating predetermined gate signals in response to the control signals supplied by the gate PCB 33.
The data driving unit 17 includes a data printed circuit board (PCB) 31 on which transmission lines of the control signals provided by the timing control unit 11 are mounted, and a data drive IC 15 for generating predetermined data signals in response to the control signals supplied by the data PCB 31. The gate drive IC 25 and the data drive IC 15 are mounted on respective tape carrier packages (TCPs) and are connected to the liquid crystal panel 5, or are directly mounted on the liquid crystal panel 5 in a chip on glass (COG) manner. FIG. 1 shows that the gate drive IC 25 and the data drive IC 15 are mounted on respective TCPs 13 and 23.
Control signals generated by the timing control unit 11 are supplied to the gate drive IC 25 through the signal transmission lines mounted on the gate PCB 33. The gate drive IC 25 generates gate signals in response to the control signals and supplies the generated gate signals to the liquid crystal panel 5. The gate signal includes a gate low voltage and a gate high voltage. The gate high voltage turns on the thin film transistors of the liquid crystal panel 5, and the gate low voltage turns off the thin film transistors of the liquid crystal panel 5. Accordingly, the gate drive IC 25 supplies the gate high voltage to the liquid crystal panel 5 during a very short time period of one frame, and supplies the gate low voltage during a remaining time period of one frame. By repeating the above operation, the gate drive IC 25 allows each gate high voltage to be supplied to each gate bus line of the liquid crystal panel 5.
The gate drive IC 25 supplies the gate high voltage, whereas the data drive IC 15 supplies data signals to the liquid crystal panel 5 according to the control signals generated by the timing control unit 11 and supplied through the signal transmission lines mounted on the data PCB 31.
For instance, when the gate high voltage is supplied to the first gate bus line of the liquid crystal panel 5, thin film transistors of respective pixel regions connected to the first gate bus line are turned on. At this time, the data signals supplied by the data drive IC 15 are applied to the pixel electrodes via the thin film transistors connected to the first gate bus line. Also, a common voltage is applied to the common electrode. A potential difference between the data signals applied to the respective pixel electrodes and the common voltage generates an electric field. The generated electric field causes displacement of liquid crystal molecules, so that transmission amount of light is controlled, thereby displaying an image with a gray scale.
In such LCD devices, the gate driving unit 27 is mounted on the liquid crystal panel 5 as shown in FIG. 2 so as to make the LCD devices thinner and reduce fabrication costs. Further, even the data and gate driving units 17, 27 are mounted on the liquid crystal panel as shown in FIG. 3. When either the gate driving unit 27 or the data driving unit 17 is mounted on the liquid crystal panel 5, a large switching element should be essentially provided where buffer TFTs are connected in parallel. U.S. Pat. No. 6,552,768 discloses a large switching element including the aforementioned buffer TFTs. The large switching element has a fast response speed, and mainly uses amorphous silicon having process convenience and good uniformity rather than polycrystalline silicon, which is difficult to process using laser crystallization.
The large switching element shown in FIG. 4 includes a gate electrode 56 connected to a gate line 52 formed on a substrate of a liquid crystal panel, a source electrode 60 connected to a source line 64, a drain electrode 72 facing the source electrode 60 and connected to a drain line 73, and a semiconductor layer 68 forming a channel between the source and drain electrodes 60, 72. FIG. 4 shows that one source electrode 60 and one drain electrode 70 are related with one gate electrode 56. However, in a real large switching element, the gate electrode 56 extend in an up and down direction, and pairs of source and drain electrodes are arranged in parallel, thereby forming two or more buffer TFTs. In the switching element of FIG. 4, the semiconductor layer 68 has a stack structure of an active layer and an ohmic contact layer contacting the source and drain electrodes 60, 72.
The large switching element has a large channel width W1 for switching at a high voltage, and is different from one TFT provided in one pixel region, and two or more TFTs provided in one pixel region disclosed in Japanese Laid Open Publication No. 5-341316. For example, the TFTs provided in pixel regions have a few μm to a few ten μm, whereas the switching elements provided in the gate driving unit or the data driving unit mounted on the liquid crystal panel have a few thousands μm to a few ten thousands μm.
Thus, when the channel width of the switching element increases to a considerable degree, the LCD device is confronted with a limitation due to a process margin. In other words, since the TFTs having a large channel width are connected in parallel, they occupy a considerable area. However, area occupied by the large switching elements should not be above the actual process margin on the liquid crystal panel. As a result, it becomes difficult to mount the switching elements connected in parallel on the liquid crystal panel. Accordingly, there has been a strong need to develop a gate driving unit or a data driving unit capable of compensating for the large channel width of the large switching elements.
Also, when the mounting area of the large switching elements increases, the related art LCD device does not meet the present trend in to have slim and lightweight LCD devices.